small improvement, Event/Agg for PHA/PSD < 512

This commit is contained in:
Ryan Tang 2024-10-28 15:12:26 -04:00
parent 8b7d93a9fe
commit c7feaec471
4 changed files with 52 additions and 21 deletions

View File

@ -576,7 +576,7 @@ void Digitizer::StartACQ(){
data->ClearTriggerRate();
data->ClearData();
if( DPPType == DPPTypeCode::DPP_QDC_CODE ) SetOptimialAggOrg();
if( DPPType == DPPTypeCode::DPP_QDC_CODE ) SetQDCOptimialAggOrg();
printf(" ACQ mode : %s (%d), TRG-OUT mode : %s (%d) \n", acqStr.c_str(), acqID, trgOutStr.c_str(), trgOutID);
@ -1351,7 +1351,50 @@ void Digitizer::SetBits(Reg address, unsigned int bitValue, unsigned int bitLeng
if( ret != 0 ) ErrorMsg(__func__);
}
void Digitizer::SetOptimialAggOrg(){
void Digitizer::AutoSetDPPEventAggregation(){
//ret = CAEN_DGTZ_SetDPPAcquisitionMode(handle, CAEN_DGTZ_DPP_ACQ_MODE_List, CAEN_DGTZ_DPP_SAVE_PARAM_EnergyAndTime);
// if( DPPType == DPPTypeCode::DPP_QDC_CODE ){
// }else{
// for( int ch = 0; ch < GetNumInputCh(); ch += 2 ){
// uint32_t a1, a2;
// ret |= CAEN_DGTZ_GetRecordLength(handle, &a1, ch);
// ret |= CAEN_DGTZ_GetNumEventsPerAggregate(handle, &a2, ch);
// printf("Ch %2d | RecordLength : %d | Event Agg : %d \n", ch, a1, a2);
// }
// uint32_t chMask ;
// ret |= CAEN_DGTZ_GetChannelEnableMask(handle, &chMask);
// printf("Ch Mask %0X \n", chMask);
// }
ret = 0;
ret |= CAEN_DGTZ_SetDPPEventAggregation(handle, 0, 0); // AutoSet
if( ret != 0 ) {
printf("!!!!!!!! set %s error.\n", __func__);
}else{
Reg regAdd = DPP::AggregateOrganization;
uint32_t haha = ReadRegister(regAdd);
SetSettingToMemory(regAdd, haha, 0);
SaveSettingToFile(regAdd, haha, 0);
}
}
uint32_t Digitizer::ReadQDCRecordLength() {
returnData = ReadRegister(DPP::QDC::RecordLength_R);
Reg temp = DPP::QDC::RecordLength_R;
int indexR = temp.Index(0);
temp = DPP::QDC::RecordLength_W;
int indexW = temp.Index(0);
setting[indexW] = setting[indexR];
//printf("%d %d | %u %u \n", indexR, indexW, setting[indexR], setting[indexW]);
return returnData;
}
void Digitizer::SetQDCOptimialAggOrg(){
DebugPrint("%s", "Digitizer");
if( DPPType != DPPTypeCode::DPP_QDC_CODE ) {
printf("%s | this method only support QDC board.\n", __func__);

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@ -95,12 +95,8 @@ class Digitizer{
void PrintBoard();
void ProgramBoard();
void AutoSetDPPEventAggregation(){
//ret = CAEN_DGTZ_SetDPPAcquisitionMode(handle, CAEN_DGTZ_DPP_ACQ_MODE_List, CAEN_DGTZ_DPP_SAVE_PARAM_EnergyAndTime);
ret |= CAEN_DGTZ_SetNumEventsPerAggregate(handle, 10);
ret |= CAEN_DGTZ_SetDPPEventAggregation(handle, 0, 0); // AutoSet
if( ret != 0 ) { printf("!!!!!!!! set %s error.\n", __func__);}
}
void AutoSetDPPEventAggregation();
//^================ ACQ control
void StopACQ();
@ -192,19 +188,9 @@ class Digitizer{
bool IsDualTrace_PHA() {return ( (GetSettingFromMemory(DPP::BoardConfiguration) >> 11) & 0x1 );}
bool IsRecordTrace() {return ( (GetSettingFromMemory(DPP::BoardConfiguration) >> 16) & 0x1 );}
void SetOptimialAggOrg();
//QDC read recordLength
uint32_t ReadQDCRecordLength() {
returnData = ReadRegister(DPP::QDC::RecordLength_R);
Reg temp = DPP::QDC::RecordLength_R;
int indexR = temp.Index(0);
temp = DPP::QDC::RecordLength_W;
int indexW = temp.Index(0);
setting[indexW] = setting[indexR];
//printf("%d %d | %u %u \n", indexR, indexW, setting[indexR], setting[indexW]);
return returnData;
}
uint32_t ReadQDCRecordLength();
void SetQDCOptimialAggOrg();
void SetTrace(bool onOff){
SetBits(DPP::BoardConfiguration, DPP::Bit_BoardConfig::RecordTrace, onOff, -1);

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@ -257,6 +257,8 @@ DigiSettingsPanel::DigiSettingsPanel(Digitizer ** digi, unsigned int nDigi, QStr
SendLogMsg("Digi-" +QString::number(digi[ID]->GetSerialNumber()) + " : AutoSetDPPEventAggregation()");
digi[ID]->AutoSetDPPEventAggregation();
UpdateBoardAndChannelsStatus();
UpdatePanelFromMemory();
emit UpdateOtherPanels();
});
// bnSendSoftwareClockSyncSignal = new QPushButton("Send SW Clock-Sync Signal", this);

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@ -508,7 +508,7 @@ namespace DPP {
const Reg RecordLength_G ("RecordLength_G" , 0x1020, RW::ReadWrite, true, 0x3FFF, 8); /// R/W
const Reg InputDynamicRange ("InputDynamicRange" , 0x1028, RW::ReadWrite, false, {{"2 Vpp", 0},{"0.5 Vpp", 1}}); /// R/W
const Reg NumberEventsPerAggregate_G ("NumberEventsPerAggregate_G" , 0x1034, RW::ReadWrite, true, 0x3FF, -1); /// R/W
const Reg NumberEventsPerAggregate_G ("NumberEventsPerAggregate_G" , 0x1034, RW::ReadWrite, true, 0x1FF, -1); /// R/W
const Reg PreTrigger ("PreTrigger" , 0x1038, RW::ReadWrite, false, 0xFF, 4); /// R/W
const Reg TriggerThreshold ("TriggerThreshold" , 0x106C, RW::ReadWrite, false, 0x3FFF, -1); /// R/W
const Reg TriggerHoldOffWidth ("TriggerHoldOffWidth" , 0x1074, RW::ReadWrite, false, 0x3FF, 4); /// R/W