1092 lines
27 KiB
Plaintext
1092 lines
27 KiB
Plaintext
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|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0
|
|
],
|
|
"TriggerDelay": [
|
|
768,
|
|
768,
|
|
768,
|
|
768,
|
|
768,
|
|
768,
|
|
392,
|
|
768,
|
|
768,
|
|
768,
|
|
768,
|
|
768,
|
|
768,
|
|
768,
|
|
768,
|
|
768
|
|
],
|
|
"VetoStretch": [
|
|
30,
|
|
30,
|
|
30,
|
|
30,
|
|
30,
|
|
30,
|
|
30,
|
|
30,
|
|
30,
|
|
30,
|
|
30,
|
|
30,
|
|
30,
|
|
30,
|
|
30,
|
|
30
|
|
],
|
|
"Xavg": [
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0
|
|
],
|
|
"Xwait": [
|
|
96,
|
|
96,
|
|
96,
|
|
96,
|
|
96,
|
|
96,
|
|
96,
|
|
96,
|
|
96,
|
|
96,
|
|
96,
|
|
96,
|
|
96,
|
|
96,
|
|
96,
|
|
96
|
|
]
|
|
}
|
|
},
|
|
"metadata": {
|
|
"config": [
|
|
{
|
|
"adc_bits": 16,
|
|
"adc_clk_div": 2,
|
|
"adc_msps": 250,
|
|
"fpga_clk_mhz": 125
|
|
},
|
|
{
|
|
"adc_bits": 16,
|
|
"adc_clk_div": 2,
|
|
"adc_msps": 250,
|
|
"fpga_clk_mhz": 125
|
|
},
|
|
{
|
|
"adc_bits": 16,
|
|
"adc_clk_div": 2,
|
|
"adc_msps": 250,
|
|
"fpga_clk_mhz": 125
|
|
},
|
|
{
|
|
"adc_bits": 16,
|
|
"adc_clk_div": 2,
|
|
"adc_msps": 250,
|
|
"fpga_clk_mhz": 125
|
|
},
|
|
{
|
|
"adc_bits": 16,
|
|
"adc_clk_div": 2,
|
|
"adc_msps": 250,
|
|
"fpga_clk_mhz": 125
|
|
},
|
|
{
|
|
"adc_bits": 16,
|
|
"adc_clk_div": 2,
|
|
"adc_msps": 250,
|
|
"fpga_clk_mhz": 125
|
|
},
|
|
{
|
|
"adc_bits": 16,
|
|
"adc_clk_div": 2,
|
|
"adc_msps": 250,
|
|
"fpga_clk_mhz": 125
|
|
},
|
|
{
|
|
"adc_bits": 16,
|
|
"adc_clk_div": 2,
|
|
"adc_msps": 250,
|
|
"fpga_clk_mhz": 125
|
|
},
|
|
{
|
|
"adc_bits": 16,
|
|
"adc_clk_div": 2,
|
|
"adc_msps": 250,
|
|
"fpga_clk_mhz": 125
|
|
},
|
|
{
|
|
"adc_bits": 16,
|
|
"adc_clk_div": 2,
|
|
"adc_msps": 250,
|
|
"fpga_clk_mhz": 125
|
|
},
|
|
{
|
|
"adc_bits": 16,
|
|
"adc_clk_div": 2,
|
|
"adc_msps": 250,
|
|
"fpga_clk_mhz": 125
|
|
},
|
|
{
|
|
"adc_bits": 16,
|
|
"adc_clk_div": 2,
|
|
"adc_msps": 250,
|
|
"fpga_clk_mhz": 125
|
|
},
|
|
{
|
|
"adc_bits": 16,
|
|
"adc_clk_div": 2,
|
|
"adc_msps": 250,
|
|
"fpga_clk_mhz": 125
|
|
},
|
|
{
|
|
"adc_bits": 16,
|
|
"adc_clk_div": 2,
|
|
"adc_msps": 250,
|
|
"fpga_clk_mhz": 125
|
|
},
|
|
{
|
|
"adc_bits": 16,
|
|
"adc_clk_div": 2,
|
|
"adc_msps": 250,
|
|
"fpga_clk_mhz": 125
|
|
},
|
|
{
|
|
"adc_bits": 16,
|
|
"adc_clk_div": 2,
|
|
"adc_msps": 250,
|
|
"fpga_clk_mhz": 125
|
|
}
|
|
],
|
|
"dsp": {
|
|
"adc_bits": 16,
|
|
"adc_msps": 250,
|
|
"file": "Pixie16DSP_revfgeneral_12b250m_r41847.ldr",
|
|
"rev": 15,
|
|
"tag": "15-250-16",
|
|
"version": "n/a"
|
|
},
|
|
"fifo": {
|
|
"buffers": 100,
|
|
"hold": 50000,
|
|
"idle-wait": 150000,
|
|
"run-wait": 2000
|
|
},
|
|
"fippi": {
|
|
"adc_bits": 16,
|
|
"adc_msps": 250,
|
|
"file": "fippixie16_revfgeneral_12b250m_r42081.bin",
|
|
"rev": 15,
|
|
"tag": "15-250-16",
|
|
"version": "n/a"
|
|
},
|
|
"hardware_revision": "F",
|
|
"num-channels": 16,
|
|
"number": 0,
|
|
"serial-num": 1314,
|
|
"slot": 2,
|
|
"sys": {
|
|
"adc_bits": 16,
|
|
"adc_msps": 250,
|
|
"file": "syspixie16_revfgeneral_adc250mhz_r33339.bin",
|
|
"rev": 15,
|
|
"tag": "15-250-16",
|
|
"version": "n/a"
|
|
},
|
|
"var": {
|
|
"adc_bits": 16,
|
|
"adc_msps": 250,
|
|
"file": "Pixie16DSP_revfgeneral_12b250m_r41847.var",
|
|
"rev": 15,
|
|
"tag": "15-250-16",
|
|
"version": "n/a"
|
|
}
|
|
},
|
|
"module": {
|
|
"input": {
|
|
"ChanNum": 0,
|
|
"CoincPattern": 0,
|
|
"CoincWait": 0,
|
|
"ControlTask": 6,
|
|
"CrateID": 0,
|
|
"FIFOLength": 8188,
|
|
"FastFilterRange": 0,
|
|
"FastTrigBackplaneEna": 0,
|
|
"HostIO": [
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0
|
|
],
|
|
"HostRunTimePreset": 1092616192,
|
|
"InSynch": 1,
|
|
"MaxEvents": 0,
|
|
"ModCSRA": 0,
|
|
"ModCSRB": 1,
|
|
"ModFormat": 0,
|
|
"ModID": 0,
|
|
"ModNum": 0,
|
|
"Resume": 1,
|
|
"RunTask": 0,
|
|
"SlotID": 2,
|
|
"SlowFilterRange": 3,
|
|
"SynchWait": 1,
|
|
"TrigConfig": [
|
|
6212,
|
|
64,
|
|
0,
|
|
0
|
|
],
|
|
"U00": [
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0
|
|
],
|
|
"UserIn": [
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0
|
|
]
|
|
}
|
|
}
|
|
}
|
|
]
|