added InputDelay for latest firmware
This commit is contained in:
parent
b79e125e88
commit
7c1314d009
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@ -45,6 +45,9 @@ void Digitizer2Gen::Initialization(){
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VGASetting[index] = PHA::VGA::VGAGain;
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LVDSSettings[index] = PHA::LVDS::AllSettings;
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}
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for( int idx = 0; idx < 16; idx ++){
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InputDelay[idx] = PHA::GROUP::InputDelay;
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}
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//build map
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for( int i = 0; i < (int) PHA::DIG::AllSettings.size(); i++) boardMap[PHA::DIG::AllSettings[i].GetPara()] = i;
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@ -131,7 +134,7 @@ std::string Digitizer2Gen::ReadValue(const Reg para, int ch_index, bool verbose
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case TYPE::DIG : boardSettings[index].SetValue(ans); break;
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case TYPE::VGA : VGASetting[ch_index].SetValue(ans); break;
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case TYPE::LVDS: LVDSSettings[ch_index][index].SetValue(ans);break;
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case TYPE::GROUP: break; //^ GROUP is not implemented
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case TYPE::GROUP: InputDelay[ch_index].SetValue(ans); break;
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}
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//printf("%s | %s | index %d | %s \n", para.GetFullPara(ch_index).c_str(), ans.c_str(), index, chSettings[ch_index][index].GetValue().c_str());
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@ -183,7 +186,7 @@ bool Digitizer2Gen::WriteValue(const Reg para, std::string value, int ch_index){
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// boardSettings[index].GetValue().c_str());
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}break;
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case TYPE::LVDS : LVDSSettings[ch_index][index].SetValue(value); break;
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case TYPE::GROUP : break;
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case TYPE::GROUP : InputDelay[ch_index].SetValue(value); break;
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}
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}
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@ -255,6 +258,9 @@ int Digitizer2Gen::OpenDigitizer(const char * url){
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VGASetting[index] = PHA::VGA::VGAGain;
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LVDSSettings[index] = PHA::LVDS::AllSettings;
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}
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for( int idx = 0; idx < 16; idx ++ ){
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InputDelay[idx] = PHA::GROUP::InputDelay;
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}
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//build map
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for( int i = 0; i < (int) PHA::DIG::AllSettings.size(); i++) boardMap[PHA::DIG::AllSettings[i].GetPara()] = i;
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@ -271,6 +277,9 @@ int Digitizer2Gen::OpenDigitizer(const char * url){
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VGASetting[index] = PSD::VGA::VGAGain;
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LVDSSettings[index] = PSD::LVDS::AllSettings;
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}
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for( int idx = 0; idx < 16; idx ++ ){
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InputDelay[idx] = PSD::GROUP::InputDelay;
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}
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//build map
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for( int i = 0; i < (int) PSD::DIG::AllSettings.size(); i++) boardMap[PSD::DIG::AllSettings[i].GetPara()] = i;
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@ -1070,6 +1079,12 @@ void Digitizer2Gen::PrintBoardSettings(){
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}
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}
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for(int idx = 0; idx < 16 ; idx ++ ){
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printf("%-45s %d %s\n", InputDelay[idx].GetFullPara(idx).c_str(),
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InputDelay[idx].ReadWrite(),
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InputDelay[idx].GetValue().c_str());
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}
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for( int i = 0; i < (int) LVDSSettings[0].size(); i++){
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for( int index = 0; index < 4; index++){
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if( LVDSSettings[index][i].ReadWrite() == RW::WriteOnly) continue;
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@ -1129,6 +1144,8 @@ void Digitizer2Gen::ReadAllSettings(){
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if( ModelName == "VX2745") for(int i = 0; i < 4 ; i ++) ReadValue(VGASetting[i], i);
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for( int idx = 0; idx < 16; idx++) ReadValue(InputDelay[idx], idx, false);
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for( int index = 0; index < 4; index++){
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for( int i = 0; i < (int) LVDSSettings[index].size(); i++){
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if( LVDSSettings[index][i].ReadWrite() == RW::WriteOnly) continue;
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@ -1185,6 +1202,20 @@ int Digitizer2Gen::SaveSettingsToFile(const char * saveFileName, bool setReadOnl
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count ++;
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}
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for( int idx = 0; idx < 16; idx ++){
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totCount ++;
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if( InputDelay[idx].GetValue() == "" ) {
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printf(" No value for %s \n", InputDelay[idx].GetPara().c_str());
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continue;
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}
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fprintf(saveFile, "%-45s!%d!%4d!%s\n", InputDelay[idx].GetFullPara(idx).c_str(),
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InputDelay[idx].ReadWrite(),
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9050 + idx,
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InputDelay[idx].GetValue().c_str());
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count ++;
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}
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if( ModelName == "VX2745" && FPGAType == DPPType::PHA) {
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for(int i = 0; i < 4 ; i ++){
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totCount ++;
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@ -1316,8 +1347,10 @@ bool Digitizer2Gen::LoadSettingsFromFile(const char * loadFileName){
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//printf("%s|%d|%d|%s\n", boardSettings[id-8000].GetFullPara().c_str(),
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// boardSettings[id-8000].ReadWrite(), id,
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// boardSettings[id-8000].GetValue().c_str());
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}else{ // vga
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}else if ( 9000 <= id && id < 9050){ // vga
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VGASetting[id - 9000].SetValue(value);
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}else{ // group
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InputDelay[id - 9050].SetValue(value);
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}
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//printf("%s|%s|%d|%s|\n", para, readWrite, id, value);
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if( std::strcmp(readWrite, "2") == 0 && isConnected) WriteValue(para, value, false);
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@ -1340,10 +1373,11 @@ bool Digitizer2Gen::LoadSettingsFromFile(const char * loadFileName){
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std::string Digitizer2Gen::GetSettingValue(const Reg para, unsigned int ch_index) {
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int index = FindIndex(para);
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switch (para.GetType()){
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case TYPE::DIG: return boardSettings[index].GetValue();
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case TYPE::CH: return chSettings[ch_index][index].GetValue();
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case TYPE::VGA: return VGASetting[ch_index].GetValue();
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case TYPE::LVDS: return LVDSSettings[ch_index][index].GetValue();
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case TYPE::DIG: return boardSettings[index].GetValue();
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case TYPE::CH: return chSettings[ch_index][index].GetValue();
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case TYPE::VGA: return VGASetting[ch_index].GetValue();
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case TYPE::LVDS: return LVDSSettings[ch_index][index].GetValue();
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case TYPE::GROUP: return InputDelay[ch_index].GetValue();
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default : return "invalid";
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}
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return "no such parameter";
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@ -12,6 +12,7 @@
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#define MaxOutFileSize 2*1024*1024*1024 //2GB
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//#define MaxOutFileSize 20*1024*1024 //20MB
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#define MaxNumberOfChannel 64
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#define MaxNumberOfGroup 16
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#include "DigiParameters.h"
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@ -62,6 +63,7 @@ class Digitizer2Gen {
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std::vector<Reg> chSettings[MaxNumberOfChannel];
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std::vector<Reg> LVDSSettings[4];
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Reg VGASetting[4];
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Reg InputDelay[16];
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std::map<std::string, int> boardMap;
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std::map<std::string, int> LVDSMap;
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@ -70,7 +70,7 @@ class Reg {
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case TYPE::CH:{
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std::string haha = "/par/";
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if( isCmd ){
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haha = "/cmd/";
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haha = "/cmd/"; // for SendChSWTrigger, not in GUI
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}
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if( ch_index == -1 ){
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return "/ch/0..63" + haha + name;
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@ -94,7 +94,7 @@ class Reg {
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}; break;
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case TYPE::GROUP:{
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if( ch_index == -1 ){
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return "/group/0..16/par/" + name;
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return "/group/0..15/par/" + name;
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}else{
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return "/group/" + std::to_string(ch_index) + "/par/" + name;
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}
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@ -173,7 +173,6 @@ namespace PHA{
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const Reg ErrorFlags ("ErrorFlags", RW::ReadOnly, TYPE::DIG, {}, ANSTYPE::BINARY, "byte");
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const Reg BoardReady ("BoardReady", RW::ReadOnly, TYPE::DIG, {{"True", "No Error"}, {"False", "Error"}});
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//^ not impletemented
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const Reg SPFLinkPresence ("SPFLinkPresence", RW::ReadOnly, TYPE::DIG, {{"True", "Inserted"}, {"False", "Disconnected"}});
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const Reg SPFLinkActive ("SPFLinkActive", RW::ReadOnly, TYPE::DIG, {{"True", "Active"}, {"False", "Deactive"}});
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const Reg SPFLinkProtocol ("SPFLinkProtocal", RW::ReadOnly, TYPE::DIG, {{"Eth1G", "1 GB/s"}, {"Eth10G", "10 GB/s"}, {"CONET2", "Conet2"}});
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@ -353,6 +352,9 @@ namespace PHA{
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SpeedSensFan2 ,
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ErrorFlags ,
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BoardReady ,
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// SPFLinkPresence ,
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// SPFLinkActive ,
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// SPFLinkProtocol ,
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ClockSource ,
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IO_Level ,
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StartSource ,
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@ -402,7 +404,7 @@ namespace PHA{
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}
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namespace GROUP{
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const Reg InputDelay ("InputDelay", RW::ReadWrite, TYPE::GROUP, {}, ANSTYPE::INTEGER, "S"); //^ Not impletemented.
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const Reg InputDelay ("InputDelay", RW::ReadWrite, TYPE::GROUP, {{"0",""}, {"100", ""}, {"0.000001", ""}}, ANSTYPE::INTEGER, "sec");
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}
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namespace VGA{
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@ -427,6 +429,9 @@ namespace PHA{
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namespace CH{
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/// ========= command
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const Reg SendChSWTrigger ("SendChSWrigger", RW::WriteOnly, TYPE::CH, {}, ANSTYPE::NONE, "", true);
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/// ========= red only
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const Reg SelfTrgRate ("SelfTrgRate", RW::ReadOnly, TYPE::CH, {}, ANSTYPE::INTEGER, "Hz");
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const Reg ChannelStatus ("ChStatus", RW::ReadOnly, TYPE::CH, {}, ANSTYPE::STR);
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@ -441,8 +446,8 @@ namespace PHA{
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/// ======= read write
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//^ not impletemented
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const Reg SelfTriggerWidh ("SelfTriggerWidth", RW::ReadWrite, TYPE::CH, {{"0", ""},{"6000", ""},{"8", ""}}, ANSTYPE::INTEGER, "ns"); // not sure the max
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const Reg SignalOffset ("SignalOffset", RW::ReadWrite, TYPE::CH, {{"0", ""},{"1000", ""},{"1", ""}}, ANSTYPE::INTEGER, "uV"); // not sure the max
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const Reg SelfTriggerWidth ("SelfTriggerWidth", RW::ReadWrite, TYPE::CH, {{"0", ""},{"6000", ""},{"8", ""}}, ANSTYPE::INTEGER, "ns"); // not sure the max
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const Reg SignalOffset ("SignalOffset", RW::ReadWrite, TYPE::CH, {{"0", ""},{"1000", ""},{"1", ""}}, ANSTYPE::INTEGER, "uV"); // not sure the max
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//^ impletemented
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@ -742,6 +747,11 @@ namespace PSD{
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const Reg ErrorFlags = PHA::DIG::ErrorFlags;
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const Reg BoardReady = PHA::DIG::BoardReady;
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const Reg SPFLinkPresence = PHA::DIG::SPFLinkPresence;
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const Reg SPFLinkActive = PHA::DIG::SPFLinkActive;
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const Reg SPFLinkProtocol = PHA::DIG::SPFLinkProtocol;
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///============= read write
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//const Reg EnableClockOutBackplane ("EnClockOutP0", RW::ReadWrite, TYPE::DIG);
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const Reg ClockSource = PHA::DIG::ClockSource;
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@ -852,6 +862,9 @@ namespace PSD{
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SpeedSensFan2 ,
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ErrorFlags ,
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BoardReady ,
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// SPFLinkPresence ,
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// SPFLinkActive ,
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// SPFLinkProtocol ,
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ClockSource ,
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IO_Level ,
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StartSource ,
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@ -899,6 +912,10 @@ namespace PSD{
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}
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namespace GROUP{
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const Reg InputDelay = PHA::GROUP::InputDelay;
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}
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namespace VGA{
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const Reg VGAGain = PHA::VGA::VGAGain;
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}
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@ -917,6 +934,9 @@ namespace PSD{
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namespace CH{
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/// ========= command
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const Reg SendChSWTrigger ("SendChSWrigger", RW::WriteOnly, TYPE::CH, {}, ANSTYPE::NONE, "", true);
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/// ========= red only
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const Reg SelfTrgRate = PHA::CH::SelfTrgRate;
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const Reg ChannelStatus = PHA::CH::ChannelStatus;
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@ -929,6 +949,11 @@ namespace PSD{
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const Reg ChannelWaveCount = PHA::CH::ChannelWaveCount;
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/// ======= read write
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//^ not impletemented
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const Reg SelfTriggerWidth = PHA::CH::SelfTriggerWidth;
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const Reg SignalOffset = PHA::CH::SignalOffset;
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//^ impletemented
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const Reg ChannelEnable = PHA::CH::ChannelEnable;
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const Reg DC_Offset = PHA::CH::DC_Offset;
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const Reg TriggerThreshold = PHA::CH::TriggerThreshold;
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@ -107,7 +107,14 @@ DigiSettingsPanel::DigiSettingsPanel(Digitizer2Gen ** digi, unsigned short nDigi
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lab->setAlignment(Qt::AlignRight | Qt::AlignCenter);
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leInfo[iDigi][j] = new QLineEdit(digiTab[iDigi]);
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leInfo[iDigi][j]->setReadOnly(true);
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leInfo[iDigi][j]->setText(QString::fromStdString(digi[iDigi]->ReadValue(infoIndex[j].second)));
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Reg reg = infoIndex[j].second;
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QString text = QString::fromStdString(digi[iDigi]->ReadValue(reg));
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if( reg.GetPara() == PHA::DIG::ADC_SampleRate.GetPara() ) {
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short tick2ns = 1000/ text.toInt();
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text += " = " + QString::number(tick2ns, 'f', 1) + " ns" ;
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}
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leInfo[iDigi][j]->setText(text);
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infoLayout->addWidget(lab, j%nRow, 2*(j/nRow));
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infoLayout->addWidget(leInfo[iDigi][j], j%nRow, 2*(j/nRow) +1);
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}
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@ -781,6 +788,21 @@ DigiSettingsPanel::DigiSettingsPanel(Digitizer2Gen ** digi, unsigned short nDigi
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}
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{//^====================== Group = InputDelay
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bdGroup[iDigi] = new QWidget(this);
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bdTab->addTab(bdGroup[iDigi], "Input Delay");
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QGridLayout * groupLayout = new QGridLayout(bdGroup[iDigi]);
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groupLayout->setAlignment(Qt::AlignTop );
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//LVDSLayout->setSpacing(2);
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for(int k = 0; k < MaxNumberOfGroup; k ++){
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SetupSpinBox(spbInputDelay[iDigi][k], PHA::GROUP::InputDelay, k, false, "ch : " + QString::number(4*k) + " - " + QString::number(4*k+3) + " [s] ", groupLayout, k/4, 2*(k%4));
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spbInputDelay[iDigi][k]->setDecimals(6);
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}
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}
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}
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{//^====================== Group channel settings
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@ -2588,6 +2610,11 @@ void DigiSettingsPanel::UpdatePanelFromMemory(bool onlyStatus){
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sbDACoutChSelect[ID]->setEnabled(false);
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}
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//------------ Group
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for( int k = 0 ; k < MaxNumberOfGroup; k++){
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FillSpinBoxValueFromMemory(spbInputDelay[ID][k], PHA::GROUP::InputDelay, k); // PHA = PSD
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}
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//@============================== Channel setting/ status
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@ -65,6 +65,7 @@ private:
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QWidget * bdVGA[MaxNumberOfDigitizer];
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QWidget * bdLVDS[MaxNumberOfDigitizer];
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QWidget * bdITL[MaxNumberOfDigitizer];
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QWidget * bdGroup[MaxNumberOfDigitizer];
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QGroupBox * box0[MaxNumberOfDigitizer];
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@ -206,6 +207,9 @@ private:
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QLineEdit * chGainFactor[MaxNumberOfDigitizer][MaxNumberOfChannel];
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QLineEdit * chADCToVolts[MaxNumberOfDigitizer][MaxNumberOfChannel];
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//--------------- Group settings
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RSpinBox * spbInputDelay[MaxNumberOfDigitizer][MaxNumberOfGroup];
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//--------------- Channel settings
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RComboBox * cbChPick[MaxNumberOfDigitizer];
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@ -952,6 +952,7 @@ bool MainWindow::CheckSOLARISpanelOK(){
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return false;
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}
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LogMsg("Found <b>" + file.fileName() + "</b>. Setting up SOLARIS panel.");
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mapping.clear();
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std::vector<int> singleDigiMap;
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detType.clear();
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