rtang/SOLARIS_QT6_DAQ
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update the DigiParameters.h and Digitizer Class for latest PHA firmware. new parameters are not implemented. Still supporting old firmware

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This commit is contained in:
Ryan Tang 2023-10-16 13:27:40 -04:00
parent b2bfcad833
commit ee05797c75
2 changed files with 30 additions and 2 deletions
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6
ClassDigitizer2Gen.cpp
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@ -104,6 +104,7 @@ int Digitizer2Gen::FindIndex(const Reg para){
case TYPE::DIG: return boardMap[para.GetPara()];
case TYPE::VGA: return 0;
case TYPE::LVDS: return LVDSMap[para.GetPara()];
case TYPE::GROUP : return 0;
}
return -1;
}
@ -130,6 +131,7 @@ std::string Digitizer2Gen::ReadValue(const Reg para, int ch_index, bool verbose
case TYPE::DIG : boardSettings[index].SetValue(ans); break;
case TYPE::VGA : VGASetting[ch_index].SetValue(ans); break;
case TYPE::LVDS: LVDSSettings[ch_index][index].SetValue(ans);break;
case TYPE::GROUP: break; //^ GROUP is not implemented
}
//printf("%s | %s | index %d | %s \n", para.GetFullPara(ch_index).c_str(), ans.c_str(), index, chSettings[ch_index][index].GetValue().c_str());
@ -180,7 +182,9 @@ bool Digitizer2Gen::WriteValue(const Reg para, std::string value, int ch_index){
// boardSettings[index].GetFullPara(ch_index).c_str(),
// boardSettings[index].GetValue().c_str());
}break;
case TYPE::LVDS : break;
case TYPE::LVDS : LVDSSettings[ch_index][index].SetValue(value); break;
case TYPE::GROUP : break;
}
}
return true;

26
DigiParameters.h
View File

@ -6,7 +6,7 @@
#include <vector>
enum ANSTYPE {INTEGER, FLOAT, LIST, STR, BYTE, BINARY, NONE};
enum TYPE {CH, DIG, LVDS, VGA};
enum TYPE {CH, DIG, LVDS, VGA, GROUP};
enum RW { ReadOnly, WriteOnly, ReadWrite};
//^==================== Register Class
@ -92,6 +92,14 @@ class Reg {
return "/vga/" + std::to_string(ch_index) + "/par/"+ name;
}
}; break;
case TYPE::GROUP:{
if( ch_index == -1 ){
return "/group/0..16/par/" + name;
}else{
return "/group/" + std::to_string(ch_index) + "/par/" + name;
}
break;
}
default:
return "invalid"; break;
}
@ -165,6 +173,11 @@ namespace PHA{
const Reg ErrorFlags ("ErrorFlags", RW::ReadOnly, TYPE::DIG, {}, ANSTYPE::BINARY, "byte");
const Reg BoardReady ("BoardReady", RW::ReadOnly, TYPE::DIG, {{"True", "No Error"}, {"False", "Error"}});
//^ not impletemented
const Reg SPFLinkPresence ("SPFLinkPresence", RW::ReadOnly, TYPE::DIG, {{"True", "Inserted"}, {"False", "Disconnected"}});
const Reg SPFLinkActive ("SPFLinkActive", RW::ReadOnly, TYPE::DIG, {{"True", "Active"}, {"False", "Deactive"}});
const Reg SPFLinkProtocol ("SPFLinkProtocal", RW::ReadOnly, TYPE::DIG, {{"Eth1G", "1 GB/s"}, {"Eth10G", "10 GB/s"}, {"CONET2", "Conet2"}});
///============= read write
const Reg ClockSource ("ClockSource", RW::ReadWrite, TYPE::DIG, {{"Internal", "Internal Clock 62.5 MHz"},
{"FPClkIn", "Front Panel Clock Input"}});
@ -286,6 +299,7 @@ namespace PHA{
const Reg SoftwareStopACQ ("SwStopAcquisition", RW::WriteOnly, TYPE::DIG, {}, ANSTYPE::NONE, "", true); // stop ACQ, whatever start source
const Reg SendSoftwareTrigger ("SendSWTrigger", RW::WriteOnly, TYPE::DIG, {}, ANSTYPE::NONE, "", true); // only work when Swtrg in the GlobalTriggerSource
const Reg ReloadCalibration ("ReloadCalibration", RW::WriteOnly, TYPE::DIG, {}, ANSTYPE::NONE, "", true);
const Reg Reboot ("Reboot", RW::WriteOnly, TYPE::DIG, {}, ANSTYPE::NONE, "", true); //^ not implemented
const std::vector<Reg> AllSettings = {
@ -387,6 +401,10 @@ namespace PHA{
}
namespace GROUP{
const Reg InputDelay ("InputDelay", RW::ReadWrite, TYPE::GROUP, {}, ANSTYPE::INTEGER, "S"); //^ Not impletemented.
}
namespace VGA{
const Reg VGAGain ("VGAGain", RW::ReadWrite, TYPE::VGA, {{"0", ""},{"40", ""}, {"0.5",""}}, ANSTYPE::INTEGER, "dB"); // VX2745 only
}
@ -422,6 +440,12 @@ namespace PHA{
const Reg ChannelWaveCount ("ChWaveCnt", RW::ReadOnly, TYPE::CH, {}, ANSTYPE::STR);
/// ======= read write
//^ not impletemented
const Reg SelfTriggerWidh ("SelfTriggerWidth", RW::ReadWrite, TYPE::CH, {{"0", ""},{"6000", ""},{"8", ""}}, ANSTYPE::INTEGER, "ns"); // not sure the max
const Reg SignalOffset ("SignalOffset", RW::ReadWrite, TYPE::CH, {{"0", ""},{"1000", ""},{"1", ""}}, ANSTYPE::INTEGER, "uV"); // not sure the max
//^ impletemented
const Reg ChannelEnable ("ChEnable", RW::ReadWrite, TYPE::CH, {{"True", "Enabled"}, {"False", "Disabled"}});
const Reg DC_Offset ("DCOffset", RW::ReadWrite, TYPE::CH, {{"0", ""}, {"100", ""}, {"1",""}}, ANSTYPE::INTEGER, "%");
const Reg TriggerThreshold ("TriggerThr", RW::ReadWrite, TYPE::CH, {{"0", ""},{"8191", ""}, {"1",""}}, ANSTYPE::INTEGER);