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EditByte in WriteRegister, coupled channel settings will set both channels

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This commit is contained in:
carina@hades 2022-08-09 17:01:08 -04:00
parent f53601c063
commit 223d751ba3
4 changed files with 218 additions and 180 deletions
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36
ClassDigitizer.cpp
View File

@ -281,23 +281,31 @@ int Digitizer::ProgramBoard(){
//=========================================================== //===========================================================
void Digitizer::WriteRegister(uint32_t address, uint32_t value, int ch ){ void Digitizer::WriteRegister(uint32_t address, uint32_t value, int ch ){
/// only for channel setting.
if( ch < 0 ) { if( ch < 0 ) {
ret = CAEN_DGTZ_WriteRegister(handle, address + 0x7000, value); ret = CAEN_DGTZ_WriteRegister(handle, address + 0x7000, value);
for( int i = 0; i < NChannel; i++) EditByte(value, address + (i << 8));
}else{ }else{
ret = CAEN_DGTZ_WriteRegister(handle, address + (ch<<8), value); ret = CAEN_DGTZ_WriteRegister(handle, address + (ch<<8), value);
EditByte( value, address + (ch<<8) );
} }
ErrorMsg("WriteRegister"); ErrorMsg("WriteRegister");
} }
uint32_t Digitizer::ReadRegister(uint32_t address, unsigned int ch, string str ){ uint32_t Digitizer::ReadRegister(uint32_t address, unsigned int ch, string str ){
uint32_t * Data = new uint32_t[NChannel]; uint32_t * Data = new uint32_t[NChannel];
printf("=dsadads====== 0x%x \n", address);
if( address < 0x8000) { if( address < 0x8000) {
if( ch < 0 ) { if( ch < 0 ) {
ret = CAEN_DGTZ_ReadRegister(handle, address + 0x7000, Data); printf("a %d-- %x \n", ch, address + 0x7000);
ret = CAEN_DGTZ_ReadRegister(handle, address + 0x7000, Data);
}else{ }else{
printf("b %d -- %x \n", ch, address + (ch << 8));
ret = CAEN_DGTZ_ReadRegister(handle, address + (ch << 8), Data); ret = CAEN_DGTZ_ReadRegister(handle, address + (ch << 8), Data);
} }
}else{ }else{
printf("--- %x \n", address);
ret = CAEN_DGTZ_ReadRegister(handle, address, Data); ret = CAEN_DGTZ_ReadRegister(handle, address, Data);
} }
ErrorMsg("ReadRegister"); ErrorMsg("ReadRegister");
@ -311,9 +319,21 @@ void Digitizer::SetChannelMask(uint32_t mask){
ErrorMsg("SetChannelMask"); ErrorMsg("SetChannelMask");
} }
void Digitizer::SetRecordLength(unsigned int ns, int ch) { WriteRegister( Register::DPP::RecordLength_G, ns / ch2ns / 8 , ch); ErrorMsg("SetRecordLength"); } void Digitizer::SetRecordLength(unsigned int ns, int ch){
void Digitizer::SetEventAggregation(unsigned int numEvent, int ch) { WriteRegister( Register::DPP::NumberEventsPerAggregate_G,numEvent, ch); ErrorMsg("SetEventAggregation"); } int ch_coupled = ch + int(pow(-1, ch));
void Digitizer::SetInputDynamicRange(unsigned int TwoVol_0_or_halfVol_1, int ch){ WriteRegister( Register::InputDynamicRange, TwoVol_0_or_halfVol_1, ch); ErrorMsg("SetInputDynamicRange");} WriteRegister( Register::DPP::RecordLength_G, ns / ch2ns / 8 , ch);
WriteRegister( Register::DPP::RecordLength_G, ns / ch2ns / 8 , ch_coupled);
ErrorMsg("SetRecordLength");
}
void Digitizer::SetEventAggregation(unsigned int numEvent, int ch){
int ch_coupled = ch + int(pow(-1, ch));
WriteRegister( Register::DPP::NumberEventsPerAggregate_G,numEvent, ch);
WriteRegister( Register::DPP::NumberEventsPerAggregate_G,numEvent, ch_coupled);
ErrorMsg("SetEventAggregation");
}
void Digitizer::SetInputDynamicRange(unsigned int TwoVol_0_or_halfVol_1, int ch){ WriteRegister( Register::DPP::InputDynamicRange, TwoVol_0_or_halfVol_1, ch); ErrorMsg("SetInputDynamicRange");}
void Digitizer::SetPreTriggerSample(unsigned int nSample, int ch) { WriteRegister( Register::DPP::PreTrigger, nSample / 4, ch); ErrorMsg("SetPreTriggerSample");} void Digitizer::SetPreTriggerSample(unsigned int nSample, int ch) { WriteRegister( Register::DPP::PreTrigger, nSample / 4, ch); ErrorMsg("SetPreTriggerSample");}
void Digitizer::SetPreTriggerDuration(unsigned int ns, int ch) { WriteRegister( Register::DPP::PreTrigger, ns / ch2ns / 4, ch); ErrorMsg("SetPreTriggerSample");} void Digitizer::SetPreTriggerDuration(unsigned int ns, int ch) { WriteRegister( Register::DPP::PreTrigger, ns / ch2ns / 4, ch); ErrorMsg("SetPreTriggerSample");}
void Digitizer::SetDCOffset(float offsetPrecentage, int ch) { WriteRegister( Register::DPP::ChannelDCOffset, uint( ADCFullSize * offsetPrecentage), ch ); ErrorMsg("SetDCOffset");} void Digitizer::SetDCOffset(float offsetPrecentage, int ch) { WriteRegister( Register::DPP::ChannelDCOffset, uint( ADCFullSize * offsetPrecentage), ch ); ErrorMsg("SetDCOffset");}
@ -542,7 +562,7 @@ unsigned long Digitizer::ReadSettingBinary(uint32_t filePos, int ch){
fseek( settingFile, filePos, SEEK_SET); fseek( settingFile, filePos, SEEK_SET);
///printf(" at pos %lu \n", ftell(settingFile)); ///printf(" at pos %lu \n", ftell(settingFile));
unsigned int lala[1]; unsigned int lala[1];
ret = fread( lala, sizeof(unsigned int), 1, settingFile); size_t dummy = fread( lala, sizeof(unsigned int), 1, settingFile);
///printf(" data at pos %lu : %x \n", ftell(settingFile), lala[0]); ///printf(" data at pos %lu : %x \n", ftell(settingFile), lala[0]);
fclose (settingFile); fclose (settingFile);
return lala[0]; return lala[0];
@ -550,12 +570,14 @@ unsigned long Digitizer::ReadSettingBinary(uint32_t filePos, int ch){
void Digitizer::EditByte(unsigned int value, uint32_t filePos){ void Digitizer::EditByte(unsigned int value, uint32_t filePos){
if ( !settingFileExist ) return ; if ( !settingFileExist ) return ;
if( filePos >= 0x8000 ) filePos = filePos & 0x0FFF; if( filePos >= 0x8000 ) filePos = filePos & 0x0FFF;
///printf(" file Pos : 0x%x \n", filePos);
settingFile = fopen (settingFileName.c_str(),"r+"); settingFile = fopen (settingFileName.c_str(),"r+");
fseek( settingFile, filePos, SEEK_SET); fseek( settingFile, filePos, SEEK_SET);
unsigned int jaja[1] = {value}; unsigned int jaja[1] = {value};
fwrite( jaja, sizeof(unsigned int), 1, settingFile); size_t dummy = fwrite( jaja, sizeof(unsigned int), 1, settingFile);
///printf("fwrie ret : %d, %x \n", (int)ret, jaja[0]); ///printf("fwrie ret : %d, %x = %d\n", (int)dummy, jaja[0], jaja[0]);
fclose (settingFile); fclose (settingFile);
} }

2
ClassDigitizer.h
View File

@ -73,7 +73,7 @@ class Digitizer{
void CreateAndSaveSettingBinary(string fileName); void CreateAndSaveSettingBinary(string fileName);
void EditByte(unsigned int value, uint32_t filePos); void EditByte(unsigned int value, uint32_t filePos);
void EditByteByRegister(uint32_t registerAddress, int ch = -1); void EditByteByRegister(uint32_t registerAddress, int ch = -1);
unsigned long ReadSettingBinary(uint32_t filePos, int ch = -1); unsigned long ReadSettingBinary(uint32_t filePos, int ch = -1); /// read from setting binary
protected: protected:

314
RegisterAddress.h
View File

@ -9,177 +9,177 @@
namespace Register { namespace Register {
static uint32_t EventReadOutBuffer = 0x0000; /// R const uint32_t EventReadOutBuffer = 0x0000; /// R
///========== Channel or Group ///========== Channel or Group
static uint32_t ChannelDummy32 = 0x1024; /// R/W const uint32_t ChannelDummy32 = 0x1024; /// R/W
static uint32_t InputDynamicRange = 0x1028; /// R/W const uint32_t InputDynamicRange = 0x1028; /// R/W
static uint32_t ChannelPulseWidth = 0x1070; /// R/W const uint32_t ChannelPulseWidth = 0x1070; /// R/W
static uint32_t ChannelTriggerThreshold = 0x1080; /// R/W const uint32_t ChannelTriggerThreshold = 0x1080; /// R/W
static uint32_t CoupleSelfTriggerLogic_G = 0x1084; /// R/W const uint32_t CoupleSelfTriggerLogic_G = 0x1084; /// R/W
static uint32_t ChannelStatus = 0x1088; /// R const uint32_t ChannelStatus = 0x1088; /// R
static uint32_t AMCFirmwareRevision = 0x108C; /// R const uint32_t AMCFirmwareRevision = 0x108C; /// R
static uint32_t ChannelDCOffset = 0x1098; /// R/W const uint32_t ChannelDCOffset = 0x1098; /// R/W
static uint32_t ChannelADCTemperature = 0x10A8; /// R const uint32_t ChannelADCTemperature = 0x10A8; /// R
static uint32_t ChannelSelfTriggerRateMeter = 0x10EC; /// R const uint32_t ChannelSelfTriggerRateMeter = 0x10EC; /// R
///========== Board ///========== Board
static uint32_t BoardConfiguration = 0x8000; /// R/W const uint32_t BoardConfiguration = 0x8000; /// R/W
static uint32_t BufferOrganization = 0x800C; /// R/W const uint32_t BufferOrganization = 0x800C; /// R/W
static uint32_t CustomSize = 0x8020; /// R/W const uint32_t CustomSize = 0x8020; /// R/W
static uint32_t ADCCalibration = 0x809C; /// W const uint32_t ADCCalibration = 0x809C; /// W
static uint32_t AcquisitionControl = 0x8100; /// R/W const uint32_t AcquisitionControl = 0x8100; /// R/W
static uint32_t AcquisitionStatus = 0x8104; /// R const uint32_t AcquisitionStatus = 0x8104; /// R
static uint32_t SoftwareTrigger = 0x8108; /// W const uint32_t SoftwareTrigger = 0x8108; /// W
static uint32_t GlobalTriggerMask = 0x810C; /// R/W const uint32_t GlobalTriggerMask = 0x810C; /// R/W
static uint32_t FrontPanelTRGOUTEnableMask = 0x8110; /// R/W const uint32_t FrontPanelTRGOUTEnableMask = 0x8110; /// R/W
static uint32_t PostTrigger = 0x8114; /// R/W const uint32_t PostTrigger = 0x8114; /// R/W
static uint32_t LVDSIOData = 0x8118; /// R/W const uint32_t LVDSIOData = 0x8118; /// R/W
static uint32_t FrontPanelIOControl = 0x811C; /// R/W const uint32_t FrontPanelIOControl = 0x811C; /// R/W
static uint32_t ChannelEnableMask = 0x8120; /// R/W const uint32_t ChannelEnableMask = 0x8120; /// R/W
static uint32_t ROCFPGAFirmwareRevision = 0x8124; /// R const uint32_t ROCFPGAFirmwareRevision = 0x8124; /// R
static uint32_t EventStored = 0x812C; /// R const uint32_t EventStored = 0x812C; /// R
static uint32_t VoltageLevelModeConfig = 0x8138; /// R/W const uint32_t VoltageLevelModeConfig = 0x8138; /// R/W
static uint32_t SoftwareClockSync = 0x813C; /// W const uint32_t SoftwareClockSync = 0x813C; /// W
static uint32_t BoardInfo = 0x8140; /// R const uint32_t BoardInfo = 0x8140; /// R
static uint32_t AnalogMonitorMode = 0x8144; /// R/W const uint32_t AnalogMonitorMode = 0x8144; /// R/W
static uint32_t EventSize = 0x814C; /// R const uint32_t EventSize = 0x814C; /// R
static uint32_t FanSpeedControl = 0x8168; /// R/W const uint32_t FanSpeedControl = 0x8168; /// R/W
static uint32_t MemoryBufferAlmostFullLevel = 0x816C; /// R/W const uint32_t MemoryBufferAlmostFullLevel = 0x816C; /// R/W
static uint32_t RunStartStopDelay = 0x8170; /// R/W const uint32_t RunStartStopDelay = 0x8170; /// R/W
static uint32_t BoardFailureStatus = 0x8178; /// R const uint32_t BoardFailureStatus = 0x8178; /// R
static uint32_t FrontPanelLVDSIONewFeatures = 0x81A0; /// R/W const uint32_t FrontPanelLVDSIONewFeatures = 0x81A0; /// R/W
static uint32_t BufferOccupancyGain = 0x81B4; /// R/W const uint32_t BufferOccupancyGain = 0x81B4; /// R/W
static uint32_t ChannelsShutdown = 0x81C0; /// W const uint32_t ChannelsShutdown = 0x81C0; /// W
static uint32_t ExtendedVetoDelay = 0x81C4; /// R/W const uint32_t ExtendedVetoDelay = 0x81C4; /// R/W
static uint32_t ReadoutControl = 0xEF00; /// R/W const uint32_t ReadoutControl = 0xEF00; /// R/W
static uint32_t ReadoutStatus = 0xEF04; /// R const uint32_t ReadoutStatus = 0xEF04; /// R
static uint32_t BoardID = 0xEF08; /// R/W const uint32_t BoardID = 0xEF08; /// R/W
static uint32_t MCSTBaseAddressAndControl = 0xEF0C; /// R/W const uint32_t MCSTBaseAddressAndControl = 0xEF0C; /// R/W
static uint32_t RelocationAddress = 0xEF10; /// R/W const uint32_t RelocationAddress = 0xEF10; /// R/W
static uint32_t InterruptStatusID = 0xEF14; /// R/W const uint32_t InterruptStatusID = 0xEF14; /// R/W
static uint32_t InterruptEventNumber = 0xEF18; /// R/W const uint32_t InterruptEventNumber = 0xEF18; /// R/W
static uint32_t MaxNumberOfEventsPerBLT = 0xEF1C; /// R/W const uint32_t MaxNumberOfEventsPerBLT = 0xEF1C; /// R/W
static uint32_t Scratch = 0xEF20; /// R/W const uint32_t Scratch = 0xEF20; /// R/W
static uint32_t SoftwareReset = 0xEF24; /// W const uint32_t SoftwareReset = 0xEF24; /// W
static uint32_t SoftwareClear = 0xEF28; /// W const uint32_t SoftwareClear = 0xEF28; /// W
///====== Common for PHA and PSD ///====== Common for PHA and PSD
namespace DPP { namespace DPP {
static uint32_t RecordLength_G = 0x1020; /// R/W const uint32_t RecordLength_G = 0x1020; /// R/W
static uint32_t InputDynamicRange = 0x1028; /// R/W const uint32_t InputDynamicRange = 0x1028; /// R/W
static uint32_t NumberEventsPerAggregate_G = 0x1034; /// R/W const uint32_t NumberEventsPerAggregate_G = 0x1034; /// R/W
static uint32_t PreTrigger = 0x1038; /// R/W const uint32_t PreTrigger = 0x1038; /// R/W
///static uint32_t TriggerThreshold = 0x106C; /// R/W ///const uint32_t TriggerThreshold = 0x106C; /// R/W
///static uint32_t TriggerHoldOffWidth = 0x1074; /// R/W ///const uint32_t TriggerHoldOffWidth = 0x1074; /// R/W
static uint32_t DPPAlgorithmControl = 0x1080; /// R/W const uint32_t DPPAlgorithmControl = 0x1080; /// R/W
static uint32_t ChannelStatus = 0x1088; /// R const uint32_t ChannelStatus = 0x1088; /// R
static uint32_t AMCFirmwareRevision = 0x108C; /// R const uint32_t AMCFirmwareRevision = 0x108C; /// R
static uint32_t ChannelDCOffset = 0x1098; /// R/W const uint32_t ChannelDCOffset = 0x1098; /// R/W
static uint32_t ChannelADCTemperature = 0x10A8; /// R const uint32_t ChannelADCTemperature = 0x10A8; /// R
static uint32_t IndividualSoftwareTrigger = 0x10C0; /// W const uint32_t IndividualSoftwareTrigger = 0x10C0; /// W
static uint32_t VetoWidth = 0x10D4; /// R/W const uint32_t VetoWidth = 0x10D4; /// R/W
static uint32_t BoardConfiguration = 0x8000; /// R/W const uint32_t BoardConfiguration = 0x8000; /// R/W
static uint32_t AggregateOrganization = 0x800C; /// R/W const uint32_t AggregateOrganization = 0x800C; /// R/W
static uint32_t ADCCalibration = 0x809C; /// W const uint32_t ADCCalibration = 0x809C; /// W
static uint32_t ChannelShutdown = 0x80BC; /// W const uint32_t ChannelShutdown = 0x80BC; /// W
static uint32_t AcquisitionControl = 0x8100; /// R/W const uint32_t AcquisitionControl = 0x8100; /// R/W
static uint32_t AcquisitionStatus = 0x8104; /// R const uint32_t AcquisitionStatus = 0x8104; /// R
static uint32_t SoftwareTrigger = 0x8108; /// W const uint32_t SoftwareTrigger = 0x8108; /// W
static uint32_t GlobalTriggerMask = 0x810C; /// R/W const uint32_t GlobalTriggerMask = 0x810C; /// R/W
static uint32_t FrontPanelTRGOUTEnableMask = 0x8110; /// R/W const uint32_t FrontPanelTRGOUTEnableMask = 0x8110; /// R/W
static uint32_t LVDSIOData = 0x8118; /// R/W const uint32_t LVDSIOData = 0x8118; /// R/W
static uint32_t FrontPanelIOControl = 0x811C; /// R/W const uint32_t FrontPanelIOControl = 0x811C; /// R/W
static uint32_t ChannelEnableMask = 0x8120; /// R/W const uint32_t ChannelEnableMask = 0x8120; /// R/W
static uint32_t ROCFPGAFirmwareRevision = 0x8124; /// R const uint32_t ROCFPGAFirmwareRevision = 0x8124; /// R
static uint32_t EventStored = 0x812C; /// R const uint32_t EventStored = 0x812C; /// R
static uint32_t VoltageLevelModeConfig = 0x8138; /// R/W const uint32_t VoltageLevelModeConfig = 0x8138; /// R/W
static uint32_t SoftwareClockSync = 0x813C; /// W const uint32_t SoftwareClockSync = 0x813C; /// W
static uint32_t BoardInfo = 0x8140; /// R /// [0:7] 0x0E = 725, 0x0B = 730, [8:15] 0x01 = 640 kSample, 0x08 = 5.12 MSample, [16:23] channel number const uint32_t BoardInfo = 0x8140; /// R /// [0:7] 0x0E = 725, 0x0B = 730, [8:15] 0x01 = 640 kSample, 0x08 = 5.12 MSample, [16:23] channel number
static uint32_t AnalogMonitorMode = 0x8144; /// R/W const uint32_t AnalogMonitorMode = 0x8144; /// R/W
static uint32_t EventSize = 0x814C; /// R const uint32_t EventSize = 0x814C; /// R
static uint32_t TimeBombDowncounter = 0x8158; /// R const uint32_t TimeBombDowncounter = 0x8158; /// R
static uint32_t FanSpeedControl = 0x8168; /// R/W const uint32_t FanSpeedControl = 0x8168; /// R/W
static uint32_t RunStartStopDelay = 0x8170; /// R/W const uint32_t RunStartStopDelay = 0x8170; /// R/W
static uint32_t BoardFailureStatus = 0x8178; /// R const uint32_t BoardFailureStatus = 0x8178; /// R
static uint32_t DisableExternalTrigger = 0x817C; /// R/W const uint32_t DisableExternalTrigger = 0x817C; /// R/W
static uint32_t TriggerValidationMask = 0x8180; /// R/W, 0x8180 + 4n const uint32_t TriggerValidationMask = 0x8180; /// R/W, 0x8180 + 4n
static uint32_t FrontPanelLVDSIONewFeatures = 0x81A0; /// R/W const uint32_t FrontPanelLVDSIONewFeatures = 0x81A0; /// R/W
static uint32_t BufferOccupancyGain = 0x81B4; /// R/W const uint32_t BufferOccupancyGain = 0x81B4; /// R/W
static uint32_t ExtendedVetoDelay = 0x81C4; /// R/W const uint32_t ExtendedVetoDelay = 0x81C4; /// R/W
static uint32_t ReadoutControl = 0xEF00; /// R/W const uint32_t ReadoutControl = 0xEF00; /// R/W
static uint32_t ReadoutStatus = 0xEF04; /// R const uint32_t ReadoutStatus = 0xEF04; /// R
static uint32_t BoardID = 0xEF08; /// R/W /// Geo address on VME crate const uint32_t BoardID = 0xEF08; /// R/W /// Geo address on VME crate
static uint32_t MCSTBaseAddressAndControl = 0xEF0C; /// R/W const uint32_t MCSTBaseAddressAndControl = 0xEF0C; /// R/W
static uint32_t RelocationAddress = 0xEF10; /// R/W const uint32_t RelocationAddress = 0xEF10; /// R/W
static uint32_t InterruptStatusID = 0xEF14; /// R/W const uint32_t InterruptStatusID = 0xEF14; /// R/W
static uint32_t InterruptEventNumber = 0xEF18; /// R/W const uint32_t InterruptEventNumber = 0xEF18; /// R/W
static uint32_t MaxNumberOfEventsPerBLT = 0xEF1C; /// R/W const uint32_t MaxNumberOfEventsPerBLT = 0xEF1C; /// R/W
static uint32_t Scratch = 0xEF20; /// R/W const uint32_t Scratch = 0xEF20; /// R/W
static uint32_t SoftwareReset = 0xEF24; /// W const uint32_t SoftwareReset = 0xEF24; /// W
static uint32_t SoftwareClear = 0xEF28; /// W const uint32_t SoftwareClear = 0xEF28; /// W
static uint32_t ConfigurationReload = 0xEF34; /// W const uint32_t ConfigurationReload = 0xEF34; /// W
static uint32_t ROMChecksum = 0xF000; /// R const uint32_t ROMChecksum = 0xF000; /// R
static uint32_t ROMChecksumByte2 = 0xF004; /// R const uint32_t ROMChecksumByte2 = 0xF004; /// R
static uint32_t ROMChecksumByte1 = 0xF008; /// R const uint32_t ROMChecksumByte1 = 0xF008; /// R
static uint32_t ROMChecksumByte0 = 0xF00C; /// R const uint32_t ROMChecksumByte0 = 0xF00C; /// R
static uint32_t ROMConstantByte2 = 0xF010; /// R const uint32_t ROMConstantByte2 = 0xF010; /// R
static uint32_t ROMConstantByte1 = 0xF014; /// R const uint32_t ROMConstantByte1 = 0xF014; /// R
static uint32_t ROMConstantByte0 = 0xF018; /// R const uint32_t ROMConstantByte0 = 0xF018; /// R
static uint32_t ROM_C_Code = 0xF01C; /// R const uint32_t ROM_C_Code = 0xF01C; /// R
static uint32_t ROM_R_Code = 0xF020; /// R const uint32_t ROM_R_Code = 0xF020; /// R
static uint32_t ROM_IEEE_OUI_Byte2 = 0xF024; /// R const uint32_t ROM_IEEE_OUI_Byte2 = 0xF024; /// R
static uint32_t ROM_IEEE_OUI_Byte1 = 0xF028; /// R const uint32_t ROM_IEEE_OUI_Byte1 = 0xF028; /// R
static uint32_t ROM_IEEE_OUI_Byte0 = 0xF02C; /// R const uint32_t ROM_IEEE_OUI_Byte0 = 0xF02C; /// R
static uint32_t ROM_BoardVersion = 0xF030; /// R const uint32_t ROM_BoardVersion = 0xF030; /// R
static uint32_t ROM_BoardFromFactor = 0xF034; /// R const uint32_t ROM_BoardFromFactor = 0xF034; /// R
static uint32_t ROM_BoardIDByte1 = 0xF038; /// R const uint32_t ROM_BoardIDByte1 = 0xF038; /// R
static uint32_t ROM_BoardIDByte0 = 0xF03C; /// R const uint32_t ROM_BoardIDByte0 = 0xF03C; /// R
static uint32_t ROM_PCB_rev_Byte3 = 0xF040; /// R const uint32_t ROM_PCB_rev_Byte3 = 0xF040; /// R
static uint32_t ROM_PCB_rev_Byte2 = 0xF044; /// R const uint32_t ROM_PCB_rev_Byte2 = 0xF044; /// R
static uint32_t ROM_PCB_rev_Byte1 = 0xF048; /// R const uint32_t ROM_PCB_rev_Byte1 = 0xF048; /// R
static uint32_t ROM_PCB_rev_Byte0 = 0xF04C; /// R const uint32_t ROM_PCB_rev_Byte0 = 0xF04C; /// R
static uint32_t ROM_FlashType = 0xF050; /// R const uint32_t ROM_FlashType = 0xF050; /// R
static uint32_t ROM_BoardSerialNumByte1 = 0xF080; /// R const uint32_t ROM_BoardSerialNumByte1 = 0xF080; /// R
static uint32_t ROM_BoardSerialNumByte0 = 0xF084; /// R const uint32_t ROM_BoardSerialNumByte0 = 0xF084; /// R
static uint32_t ROM_VCXO_Type = 0xF088; /// R const uint32_t ROM_VCXO_Type = 0xF088; /// R
namespace PHA { namespace PHA {
static uint32_t DataFlush = 0x103C; /// W not sure const uint32_t DataFlush = 0x103C; /// W not sure
static uint32_t ChannelStopAcquisition = 0x1040; /// R/W not sure const uint32_t ChannelStopAcquisition = 0x1040; /// R/W not sure
static uint32_t RCCR2SmoothingFactor = 0x1054; /// R/W Trigger Filter smoothing, triggerSmoothingFactor const uint32_t RCCR2SmoothingFactor = 0x1054; /// R/W Trigger Filter smoothing, triggerSmoothingFactor
static uint32_t InputRiseTime = 0x1058; /// R/W OK const uint32_t InputRiseTime = 0x1058; /// R/W OK
static uint32_t TrapezoidRiseTime = 0x105C; /// R/W OK const uint32_t TrapezoidRiseTime = 0x105C; /// R/W OK
static uint32_t TrapezoidFlatTop = 0x1060; /// R/W OK const uint32_t TrapezoidFlatTop = 0x1060; /// R/W OK
static uint32_t PeakingTime = 0x1064; /// R/W OK const uint32_t PeakingTime = 0x1064; /// R/W OK
static uint32_t DecayTime = 0x1068; /// R/W OK const uint32_t DecayTime = 0x1068; /// R/W OK
static uint32_t TriggerThreshold = 0x106C; /// R/W OK const uint32_t TriggerThreshold = 0x106C; /// R/W OK
static uint32_t RiseTimeValidationWindow = 0x1070; /// R/W OK const uint32_t RiseTimeValidationWindow = 0x1070; /// R/W OK
static uint32_t TriggerHoldOffWidth = 0x1074; /// R/W OK const uint32_t TriggerHoldOffWidth = 0x1074; /// R/W OK
static uint32_t PeakHoldOff = 0x1078; /// R/W OK const uint32_t PeakHoldOff = 0x1078; /// R/W OK
static uint32_t ShapedTriggerWidth = 0x1084; /// R/W not sure const uint32_t ShapedTriggerWidth = 0x1084; /// R/W not sure
static uint32_t DPPAlgorithmControl2_G = 0x10A0; /// R/W OK const uint32_t DPPAlgorithmControl2_G = 0x10A0; /// R/W OK
static uint32_t FineGain = 0x10C4; /// R/W OK const uint32_t FineGain = 0x10C4; /// R/W OK
} }
namespace PSD { namespace PSD {
static uint32_t CFDSetting = 0x103C; /// R/W const uint32_t CFDSetting = 0x103C; /// R/W
static uint32_t ForcedDataFlush = 0x1040; /// W const uint32_t ForcedDataFlush = 0x1040; /// W
static uint32_t ChargeZeroSuppressionThreshold = 0x1044; /// R/W const uint32_t ChargeZeroSuppressionThreshold = 0x1044; /// R/W
static uint32_t ShortGateWidth = 0x1054; /// R/W const uint32_t ShortGateWidth = 0x1054; /// R/W
static uint32_t LongGateWidth = 0x1058; /// R/W const uint32_t LongGateWidth = 0x1058; /// R/W
static uint32_t GateOffset = 0x105C; /// R/W const uint32_t GateOffset = 0x105C; /// R/W
static uint32_t TriggerThreshold = 0x1060; /// R/W const uint32_t TriggerThreshold = 0x1060; /// R/W
static uint32_t FixedBaseline = 0x1064; /// R/W const uint32_t FixedBaseline = 0x1064; /// R/W
static uint32_t TriggerLatency = 0x106C; /// R/W const uint32_t TriggerLatency = 0x106C; /// R/W
static uint32_t ShapedTriggerWidth = 0x1070; /// R/W const uint32_t ShapedTriggerWidth = 0x1070; /// R/W
static uint32_t TriggerHoldOffWidth = 0x1074; /// R/W const uint32_t TriggerHoldOffWidth = 0x1074; /// R/W
static uint32_t ThresholdForPSDCut = 0x1078; /// R/W const uint32_t ThresholdForPSDCut = 0x1078; /// R/W
static uint32_t PureGapThreshold = 0x107C; /// R/W const uint32_t PureGapThreshold = 0x107C; /// R/W
static uint32_t DPPAlgorithmControl2_G = 0x1084; /// R/W const uint32_t DPPAlgorithmControl2_G = 0x1084; /// R/W
static uint32_t EarlyBaselineFreeze = 0x10D8; /// R/W const uint32_t EarlyBaselineFreeze = 0x10D8; /// R/W
} }
} }
} }

46
test.cpp
View File

@ -8,30 +8,46 @@ int main(int argc, char* argv[]){
dig[0].OpenDigitizer(0,0, true); dig[0].OpenDigitizer(0,0, true);
dig[0].ReadRegister(Register::DPP::BoardConfiguration, -1, "Board configure"); //dig[0].ReadRegister(Register::DPP::BoardConfiguration, -1, "Board configure");
dig[0].ReadRegister(Register::DPP::ROM_BoardIDByte0, -1, "Board ID Byte 0"); //dig[0].ReadRegister(Register::DPP::ROM_BoardIDByte0, -1, "Board ID Byte 0");
dig[0].ReadRegister(Register::DPP::ROM_BoardIDByte1, -1, "Board ID Byte 1"); //dig[0].ReadRegister(Register::DPP::ROM_BoardIDByte1, -1, "Board ID Byte 1");
dig[0].ReadRegister(Register::DPP::ROM_BoardSerialNumByte0, -1, "Board SN Byte 1"); //dig[0].ReadRegister(Register::DPP::ROM_BoardSerialNumByte0, -1, "Board SN Byte 1");
dig[0].ReadRegister(Register::DPP::ROM_BoardSerialNumByte1, -1, "Board SN Byte 0"); //dig[0].ReadRegister(Register::DPP::ROM_BoardSerialNumByte1, -1, "Board SN Byte 0");
dig[0].ReadRegister(Register::DPP::AMCFirmwareRevision, 0, "AMCFirmware"); //dig[0].ReadRegister(Register::DPP::AMCFirmwareRevision, 0, "AMCFirmware");
dig[0].ReadRegister(Register::DPP::ROCFPGAFirmwareRevision, 0, "ROC FPGA"); //dig[0].ReadRegister(Register::DPP::ROCFPGAFirmwareRevision, 0, "ROC FPGA");
dig[0].ReadRegister(Register::DPP::GlobalTriggerMask, 0, "trigger mask"); //dig[0].ReadRegister(Register::DPP::GlobalTriggerMask, 0, "trigger mask");
dig[0].ReadRegister(Register::DPP::ChannelEnableMask, 0, "Channel mask"); //dig[0].ReadRegister(Register::DPP::ChannelEnableMask, 0, "Channel mask");
//
//
dig[0].ReadRegister(Register::DPP::PHA::TriggerThreshold, 0, "trigger threshold"); //dig[0].ReadRegister(Register::DPP::PHA::TriggerThreshold, 0, "trigger threshold");
//dig[0].CreateAndSaveSettingBinary("test.bin"); //dig[0].CreateAndSaveSettingBinary("test.bin");
dig[0].OpenSettingBinary("test.bin"); dig[0].OpenSettingBinary("test.bin");
//
//printf("0x%x \n", (unsigned int)dig[0].ReadSettingBinary(Register::DPP::BoardConfiguration));
//printf("0x%x \n", (unsigned int)dig[0].ReadSettingBinary(Register::DPP::GlobalTriggerMask));
//printf("0x%x \n", (unsigned int)dig[0].ReadSettingBinary(Register::DPP::PHA::TriggerThreshold, 0));
printf("0x%x \n", (unsigned int)dig[0].ReadSettingBinary(Register::DPP::BoardConfiguration)); printf("======================= \n");
printf("0x%x \n", (unsigned int)dig[0].ReadSettingBinary(Register::DPP::GlobalTriggerMask)); dig[0].SetRecordLength(2000);
printf("0x%x \n", (unsigned int)dig[0].ReadSettingBinary(Register::DPP::PHA::TriggerThreshold, 0));
dig[0].GetChannelSettingFromDigitizer(0);
printf("0x%x \n", (unsigned int)dig[0].ReadSettingBinary(Register::DPP::RecordLength_G, 0));
printf("0x%x \n", (unsigned int)dig[0].ReadSettingBinary(Register::DPP::RecordLength_G, 4));
dig[0].SetRecordLength(4000);
printf("0x%x \n", (unsigned int)dig[0].ReadSettingBinary(Register::DPP::RecordLength_G, 0));
printf("0x%x \n", (unsigned int)dig[0].ReadSettingBinary(Register::DPP::RecordLength_G, 3));
printf("0x%x \n", (unsigned int)dig[0].ReadSettingBinary(Register::DPP::RecordLength_G, 6));
dig[0].SetRecordLength(3000, 0);
printf("0x%x \n", (unsigned int)dig[0].ReadSettingBinary(Register::DPP::RecordLength_G, 0));
printf("0x%x \n", (unsigned int)dig[0].ReadSettingBinary(Register::DPP::RecordLength_G, 1));
printf("0x%x \n", (unsigned int)dig[0].ReadSettingBinary(Register::DPP::RecordLength_G, 2));
/* dig[1].OpenDigitizer(1,0, true); /* dig[1].OpenDigitizer(1,0, true);
/* /*