add CupVer protection for Input Delay setting
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7c1314d009
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@ -26,6 +26,7 @@ void Digitizer2Gen::Initialization(){
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FPGAType = "";
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FPGAType = "";
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nChannels = 0;
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nChannels = 0;
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ch2ns = 0;
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ch2ns = 0;
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CupVer = 0;
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outFileIndex = 0;
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outFileIndex = 0;
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FinishedOutFilesSize = 0;
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FinishedOutFilesSize = 0;
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@ -235,6 +236,7 @@ int Digitizer2Gen::OpenDigitizer(const char * url){
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FPGAVer = atoi(ReadValue(PHA::DIG::CupVer).c_str());
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FPGAVer = atoi(ReadValue(PHA::DIG::CupVer).c_str());
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nChannels = atoi(ReadValue(PHA::DIG::NumberOfChannel).c_str());
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nChannels = atoi(ReadValue(PHA::DIG::NumberOfChannel).c_str());
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ModelName = ReadValue(PHA::DIG::ModelName);
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ModelName = ReadValue(PHA::DIG::ModelName);
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CupVer = atoi(ReadValue(PHA::DIG::CupVer).c_str());
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int adcRate = atoi(ReadValue(PHA::DIG::ADC_SampleRate).c_str());
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int adcRate = atoi(ReadValue(PHA::DIG::ADC_SampleRate).c_str());
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ch2ns = 1000/adcRate;
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ch2ns = 1000/adcRate;
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@ -1079,10 +1081,12 @@ void Digitizer2Gen::PrintBoardSettings(){
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}
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}
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}
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}
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for(int idx = 0; idx < 16 ; idx ++ ){
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if( CupVer >= 2023091800 ){
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printf("%-45s %d %s\n", InputDelay[idx].GetFullPara(idx).c_str(),
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for(int idx = 0; idx < 16 ; idx ++ ){
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InputDelay[idx].ReadWrite(),
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printf("%-45s %d %s\n", InputDelay[idx].GetFullPara(idx).c_str(),
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InputDelay[idx].GetValue().c_str());
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InputDelay[idx].ReadWrite(),
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InputDelay[idx].GetValue().c_str());
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}
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}
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}
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for( int i = 0; i < (int) LVDSSettings[0].size(); i++){
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for( int i = 0; i < (int) LVDSSettings[0].size(); i++){
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@ -1144,7 +1148,7 @@ void Digitizer2Gen::ReadAllSettings(){
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if( ModelName == "VX2745") for(int i = 0; i < 4 ; i ++) ReadValue(VGASetting[i], i);
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if( ModelName == "VX2745") for(int i = 0; i < 4 ; i ++) ReadValue(VGASetting[i], i);
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for( int idx = 0; idx < 16; idx++) ReadValue(InputDelay[idx], idx, false);
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if( CupVer >= 2023091800 ) for( int idx = 0; idx < 16; idx++) ReadValue(InputDelay[idx], idx, false);
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for( int index = 0; index < 4; index++){
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for( int index = 0; index < 4; index++){
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for( int i = 0; i < (int) LVDSSettings[index].size(); i++){
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for( int i = 0; i < (int) LVDSSettings[index].size(); i++){
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@ -1202,18 +1206,19 @@ int Digitizer2Gen::SaveSettingsToFile(const char * saveFileName, bool setReadOnl
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count ++;
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count ++;
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}
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}
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for( int idx = 0; idx < 16; idx ++){
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if( CupVer >= 2023091800 ){
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totCount ++;
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for( int idx = 0; idx < 16; idx ++){
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if( InputDelay[idx].GetValue() == "" ) {
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totCount ++;
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printf(" No value for %s \n", InputDelay[idx].GetPara().c_str());
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if( InputDelay[idx].GetValue() == "" ) {
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continue;
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printf(" No value for %s \n", InputDelay[idx].GetPara().c_str());
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continue;
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}
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fprintf(saveFile, "%-45s!%d!%4d!%s\n", InputDelay[idx].GetFullPara(idx).c_str(),
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InputDelay[idx].ReadWrite(),
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9050 + idx,
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InputDelay[idx].GetValue().c_str());
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count ++;
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}
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}
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fprintf(saveFile, "%-45s!%d!%4d!%s\n", InputDelay[idx].GetFullPara(idx).c_str(),
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InputDelay[idx].ReadWrite(),
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9050 + idx,
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InputDelay[idx].GetValue().c_str());
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count ++;
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}
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}
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if( ModelName == "VX2745" && FPGAType == DPPType::PHA) {
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if( ModelName == "VX2745" && FPGAType == DPPType::PHA) {
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@ -1350,7 +1355,7 @@ bool Digitizer2Gen::LoadSettingsFromFile(const char * loadFileName){
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}else if ( 9000 <= id && id < 9050){ // vga
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}else if ( 9000 <= id && id < 9050){ // vga
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VGASetting[id - 9000].SetValue(value);
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VGASetting[id - 9000].SetValue(value);
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}else{ // group
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}else{ // group
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InputDelay[id - 9050].SetValue(value);
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if( CupVer >= 2023091800 ) InputDelay[id - 9050].SetValue(value);
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}
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}
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//printf("%s|%s|%d|%s|\n", para, readWrite, id, value);
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//printf("%s|%s|%d|%s|\n", para, readWrite, id, value);
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if( std::strcmp(readWrite, "2") == 0 && isConnected) WriteValue(para, value, false);
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if( std::strcmp(readWrite, "2") == 0 && isConnected) WriteValue(para, value, false);
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@ -33,6 +33,7 @@ class Digitizer2Gen {
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char retValue[256];
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char retValue[256];
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unsigned short serialNumber;
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unsigned short serialNumber;
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unsigned int CupVer;
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std::string FPGAType; // look the DigitiParameter.h::PHA::DIG::FirwareType, DPP_PHA, DPP_ZLE, DPP_PSD, DPP_DAW, DPP_OPEN, and Scope
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std::string FPGAType; // look the DigitiParameter.h::PHA::DIG::FirwareType, DPP_PHA, DPP_ZLE, DPP_PSD, DPP_DAW, DPP_OPEN, and Scope
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unsigned int FPGAVer; // for checking copy setting
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unsigned int FPGAVer; // for checking copy setting
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unsigned short nChannels;
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unsigned short nChannels;
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@ -77,6 +78,7 @@ class Digitizer2Gen {
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std::string GetFPGAType() const {return FPGAType;}
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std::string GetFPGAType() const {return FPGAType;}
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std::string GetModelName() const {return ModelName;}
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std::string GetModelName() const {return ModelName;}
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unsigned int GetFPGAVersion() const {return FPGAVer;}
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unsigned int GetFPGAVersion() const {return FPGAVer;}
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unsigned int GetCupVer() const {return CupVer;}
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void SetDummy(unsigned short sn);
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void SetDummy(unsigned short sn);
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bool IsDummy() const {return isDummy;}
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bool IsDummy() const {return isDummy;}
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@ -788,7 +788,8 @@ DigiSettingsPanel::DigiSettingsPanel(Digitizer2Gen ** digi, unsigned short nDigi
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}
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}
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{//^====================== Group = InputDelay
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if( digi[iDigi]->GetCupVer() >= 2023091800 ){
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//^====================== Group = InputDelay
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bdGroup[iDigi] = new QWidget(this);
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bdGroup[iDigi] = new QWidget(this);
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bdTab->addTab(bdGroup[iDigi], "Input Delay");
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bdTab->addTab(bdGroup[iDigi], "Input Delay");
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QGridLayout * groupLayout = new QGridLayout(bdGroup[iDigi]);
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QGridLayout * groupLayout = new QGridLayout(bdGroup[iDigi]);
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@ -799,8 +800,9 @@ DigiSettingsPanel::DigiSettingsPanel(Digitizer2Gen ** digi, unsigned short nDigi
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SetupSpinBox(spbInputDelay[iDigi][k], PHA::GROUP::InputDelay, k, false, "ch : " + QString::number(4*k) + " - " + QString::number(4*k+3) + " [s] ", groupLayout, k/4, 2*(k%4));
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SetupSpinBox(spbInputDelay[iDigi][k], PHA::GROUP::InputDelay, k, false, "ch : " + QString::number(4*k) + " - " + QString::number(4*k+3) + " [s] ", groupLayout, k/4, 2*(k%4));
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spbInputDelay[iDigi][k]->setDecimals(6);
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spbInputDelay[iDigi][k]->setDecimals(6);
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}
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}
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}else{
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bdGroup[iDigi] = nullptr;
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}
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}
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}
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}
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