carina@hades
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12f965f788
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added fast decode, that skipp waveform
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2022-10-24 17:01:05 -04:00 |
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carina@hades
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f9ced8aac7
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tested the buffer size calculation with real signal. the CEAN one is 2 times more
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2022-10-24 14:40:16 -04:00 |
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carina@hades
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12f17fe912
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matched the buffer calculation with CEAN, but it is like 2 times bigger.
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2022-10-20 13:51:06 -04:00 |
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carina@hades
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d42b5383c2
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EventBuilder for sigle digitizer
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2022-10-19 18:14:58 -04:00 |
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carina@hades
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c851da2f3c
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finished the save/load of setting file while offline
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2022-10-17 14:42:00 -04:00 |
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carina@hades
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d6a29e1b8f
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added programSetting.h/cpp, added bufferSize calculation, not tested
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2022-10-14 18:27:31 -04:00 |
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carina@hades
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12d54d2e3b
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create Reg class and implement the chaneg to ClassDigitizer.h/cpp, clean up ClassDigitizer.h/cpp
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2022-10-13 18:06:07 -04:00 |
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carina@hades
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31a39defe7
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added Register Class, aim for simplify the code algorithm
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2022-10-10 18:35:35 -04:00 |
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carina@hades
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4d3ced9b48
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added save and translate setting File
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2022-10-07 16:15:58 -04:00 |
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carina@hades
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fcd3463c70
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tested in test.cpp for loading setting file and program digitizer
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2022-10-06 17:10:54 -04:00 |
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carina@hades
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44527bba49
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fix some bugs
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2022-10-06 15:49:08 -04:00 |
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carina@hades
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8fa455925b
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small change
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2022-10-06 13:06:11 -04:00 |
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carina@hades
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a209b01e3a
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All digitizers settign has a copy in the memory
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2022-10-05 17:54:10 -04:00 |
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carina@hades
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97413b41dd
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added registerSetting.h/cpp for controlling all register for all channels
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2022-10-04 16:54:01 -04:00 |
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carina@hades
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e0b922000b
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added some UI elements, can fill histogram when StartRUN
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2022-09-29 15:26:40 -04:00 |
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carina@hades
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f29dfb1438
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clean up FSQDAQ.h/cpp a bit
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2022-09-28 17:54:33 -04:00 |
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carina@hades
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826c54ed52
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reproduced BoxScore at test.cpp
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2022-09-28 15:09:27 -04:00 |
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carina@hades
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7fee55a094
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going to retire DigitizerPHA and DigitizerPSD, since direct access register. tested for 1 digitizer with PHA, seems OK. going to plot tarce and other stuff
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2022-09-27 17:58:14 -04:00 |
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carina@hades
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f8ddccdac8
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testing with digitizers
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2022-09-26 16:47:20 -04:00 |
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carina@hades
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db7814b193
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tested boardSetting GUI, now need to read all setting from Digitizer
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2022-09-16 17:53:57 -04:00 |
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carina@hades
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354efc39b8
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added a more code frinedly SetSetting and GetSetting
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2022-08-29 18:06:12 -04:00 |
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carina@hades
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545aaec419
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improved ClassData and channelSetting
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2022-08-26 17:18:43 -04:00 |
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carina@hades
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7f720c1655
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edited boardSetting panel
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2022-08-24 17:50:21 -04:00 |
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carina@hades
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c264157a4a
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added PSD buffer decode
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2022-08-23 15:49:03 -04:00 |
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carina@hades
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4ead86783a
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many many changes
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2022-08-23 13:43:05 -04:00 |
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carina@hades
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c5fd1b1f65
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now have proper energy. testing timestamp roll over
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2022-08-18 17:34:28 -04:00 |
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carina@hades
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b2b5c75bb3
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created test_indep for testing code.
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2022-08-17 16:08:49 -04:00 |
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carina@hades
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be16a4369b
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snapshot, don't understand why triggered but zero energy
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2022-08-15 18:54:55 -04:00 |
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carina@hades
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0a6f866f7a
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also save TRG-OUT setting, change PHA default channel setting
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2022-08-12 18:13:54 -04:00 |
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carina@hades
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972c249076
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the price for adjust setting directly to register is need to manually allocate memory.
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2022-08-10 18:35:13 -04:00 |
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carina@hades
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1f943d8ded
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added PrintACQStatus
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2022-08-09 17:31:36 -04:00 |
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carina@hades
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223d751ba3
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EditByte in WriteRegister, coupled channel settings will set both channels
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2022-08-09 17:01:08 -04:00 |
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carina@hades
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f53601c063
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added setting binary control
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2022-08-09 16:02:45 -04:00 |
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athena
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cb722ba86b
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checked all PHA parameters. added DataClass.h and macro.h
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2022-08-05 18:15:50 -04:00 |
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splitPoleDAQ
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c0f9aa5eba
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change nSample to ns
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2022-08-05 16:32:46 -04:00 |
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splitPoleDAQ
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35278fc37b
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should focus on 1 board frist
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2022-08-04 18:02:03 -04:00 |
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splitPoleDAQ
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14731d5dea
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seperated DigitizerClass to DigitizerPHA, DigitizerPSD, add prototye of FSUDAQ
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2022-08-04 17:27:33 -04:00 |
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splitPoleDAQ
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240a35aba6
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building the digitizer class
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2022-08-03 19:00:41 -04:00 |
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